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Which of the following describes a ‘superscalar’ architecture?
A. A processor that can execute multiple instructions per clock cycle by using multiple execution units
B. A processor with a single execution unit that processes instructions sequentially
C. A system that executes instructions from multiple threads simultaneously
D. A processor that can handle multiple processes by switching contexts rapidly
Answer: A processor that can execute multiple instructions per clock cycle by using multiple execution units
What is the role of the ‘control unit’ in a CPU?
A. To direct the operation of the processor by interpreting instructions and managing data flow
B. To handle arithmetic and logic operations
C. To manage memory access and storage
D. To execute instructions in parallel
Answer: To direct the operation of the processor by interpreting instructions and managing data flow
What is the purpose of ‘branch prediction’ in a CPU?
A. To predict the outcome of a branch instruction to avoid pipeline stalls
B. To estimate the next instruction address
C. To calculate the branch execution time
D. To manage branch instructions efficiently
Answer: To predict the outcome of a branch instruction to avoid pipeline stalls
Which technique involves breaking down a task into smaller, more manageable pieces that can be executed concurrently?
A. Task decomposition
B. Task scheduling
C. Task partitioning
D. Task segmentation
Answer: Task decomposition
What is ‘cache coherence’ in multiprocessor systems?
A. The consistency of data stored in cache memories of different processors
B. The synchronization of different cache levels
C. The speed at which data is accessed from cache
D. The ability of the cache to handle concurrent accesses
Answer: The consistency of data stored in cache memories of different processors
What is the primary function of the ‘instruction register’ in a CPU?
A. To hold the current instruction being executed
B. To store the result of arithmetic operations
C. To manage the program counter
D. To control the execution flow
Answer: To hold the current instruction being executed
What does ‘thread-level parallelism’ refer to in modern processors?
A. Executing multiple threads concurrently within a single processor core
B. Splitting a single thread into multiple smaller threads
C. Running multiple processes simultaneously
D. Managing parallel execution of different programs
Answer: Executing multiple threads concurrently within a single processor core
Which memory hierarchy level is closest to the CPU and has the fastest access time?
A. L1 Cache
B. L2 Cache
C. Main Memory
D. Disk Storage
Answer: L1 Cache
What is the function of a ‘bus’ in computer architecture?
A. To facilitate communication between different components of the computer system
B. To increase the CPU's clock speed
C. To manage memory allocation
D. To control input/output devices
Answer: To facilitate communication between different components of the computer system